The global academic community for Arm based System on Chip design
Join our communitySign Up

Our goals are simple, to help:

  • You: to develop industrially relevant, real world, silicon proven, SoC design skills that you need in your research and become one of the next generation of chip designers.
  • Each other: learn, solve problems and get to results faster. Industrial SoC design is a team effort. Community centric hardware design helps us all create, verify, and fabricate better custom silicon.
  • Reuse prior knowledge: by using reference designs, tested, validated ‘blueprints’ for Systems, you can quickly integrate your innovative research, simplifying the effort needed to fabricate real silicon devices

Providing state-of-the-art System on Chip design skills needed for the next wave of AI hardware innovation

Training: See our training schedule for workshops and events.

Share experience: Join our projects, add comments, declare interests...

Build your SoC: Select design IP, follow the design flow, create your silicon!


Feel free to use the site's resources, use the navigation icons within the pages and the navigation scheme above

Below you will see the core reusable reference designs the community maintain to simplify and lower the cost of academic SoC design.

Reference Design
Cover image
nanoSoC demo: kNN project
nanoSoC
A simple, low cost, entry level microcontroller SoC extendable for custom accelerators or simple signal processing, ideal for PhD or other students.
Reference Design
Cover image
MilliSoC architecture
milliSoC
A mid-range SoC targeting low latency needs such as RF / radar signal processing, constrained AI models, low resolution real-time video, for small team project.
Reference Design
Cover image
Megasoc architecture
megaSoC
A high end SOC, suitable for larger AI models that require deployment on both CPU and custom accelerator, full resolution video, or other subsystems, ideal for team based research.
Title nanoSoC milliSoC megaSoC
Class Entry Mid Range High End
Processor(s) M0 R5 A53
Processor(s) (speed) <250 Mhz 250-800 MHz 1 GHz
Virtual Prototype Environment Xilinx ZCU104 Arm MPS3 HAPS

Take part in one of our design contests and get support for you silicon fabrication tape out

Article
 
DATE 25-26 SoC Design Contest Cover image
At DATE 24 we launched the “Understanding Our World” SoC design contest for 2024/25 and we are pleased to return to DATE to delivery the workshop "SoC Labs: The academic community for System on Chip Development" where we will present prior projects from around the world and the progress they have made to taping out their SoC designs. For the year ahead we are pleased to announce an new contest.

Examples of academic tape ours using the Arm ecosystem

Known Good Dies