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Authored Comments
Subject | Comment | Link to Comment |
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Interesting SoC Labs project |
Hi, Hope you are well. There is an interesting project in this years design contest. They are developing some digital signal processing modules for wireless radar sensing. Interference Detection and Mitigation Accelerator for Automotive Radar SoCs | SoC Labs I would be keen to build an RF community around SoC Labs. John. |
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RF and Analog design |
Hi, You have added an interesting set of interests and I think these fit well with projects in this years design contest. I don't know if you feel able to develop your own project for the contest this year but we would be very keen to help get you involved. Perhaps if you don't feel able to develop a full project on your own we can help form a collaboration with another University? Look forward to hearing from you, John. |
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Updates to milestones (end of May 2024) |
Hi, It would be good to get an update on your milestones at the end of the month. John. |
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Updates to milestones (end of May 2024) |
Hi, It would be good to get an update on your milestones at the end of the month. You had a Target Date of May 31, 2024 for your Domain Specific Design. How is that progressing?
John. |
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Updates to milestones (end of May 2024) |
Hi, It would be good to get an update on your milestones at the end of the month. I think you edited Milestone #1 to be'Determine project scope and focus' How is that progressing? We look forward to hearing from you. John. |
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Voltage range data from the sensors and Machine Learning |
Hi, It looks like the Architectural Design for the analog front end is progressing. Have you thought about the voltage range data and how that might be processed in terms of your ideas for Machine Learning? You might want to consider that and continue the development of a full Architectural Design for your SoC. You could develop on the comment from Daniel to investigate "...nanoSoC there is a expansion region where you can integrate this, you may want to look some of last years competition projects as most of these were focused on ML/AI" You could leave this part of the Architectural Design for your SoC for now and go into Behavioural Design for the analog front end? Let us know what you are planning and if you need any more help? John. |
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Joining Projects and sharing interests |
If you are part of the group working on the project Monitoring and enhancing plant growth in space ecosystems | SoC Labs Then you can join the project in your profile. It is easy to do, just click the action on the right hand side in the project.
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Die are back |
Good news, the die are back from fabrication. How are the activities going for the tests for the die using the test board and your application to run on the test board as a demonstration? John. |
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Die are back |
Srimanth, The die are back. Are you ready for testing the design with the test board? John. |
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Updates to milestones (end of May 2024) |
Hi, It would be good to get an update on your milestones at the end of the month. I think you have been working on the interface Atrial Fibrillation Detection Accelerator core to main Nanosoc. As I understand things, you were considering the need for a DMA for data transfer. If you do not use a DMA the processor will have to initiate all transfer of data between your sensor input and your custom accelerator. Let us know where you have got to? John. |
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Comments
Hi John,Thank you so much…
Hi John,
Thank you so much for the warm welcome to the community. Sure I would love to learn more. We can have a meeting at your convenience and discuss it. Let me know which times and dates work for you.
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